Fujitsu F2MC-16LX Hardware Manual page 433

PPG Output Operation
The 8/16-bit PPG timer is started to begin the count when both the bit 7 (PEN0) of PPGC0 register for 0
(ch2/ch4) PPG and the bit 15 (PEN1) of PPGC1 register for 1 (ch3/ch5) PPG are set to "1". After the
operation started, when "0" is written to the bit 7 (PEN0) of PPGC0 or the bit 15 (PEN1) of PPGC1, the
count operation is stopped and the pulse output is held at the "L" level thereafter.
Do not set the ch1 (ch3/ch5) to the operating status in the 8-bit prescaler + 8-bit PPG mode when the ch0
(channel2/4) is in the stop state.
Control the bit 7 (PEN0) in the PPGC0 register and the bit 15 (PEN1) in the PPGC1 register to
simultaneously start and stop in the 16-bit PPG mode.
PPG output operation is explained as follows.
When the PPG operates, the pulse wave is continuously output in an arbiter cycle and arbiter duty ratio
(ratio of "H" level period and "L" level period of pulse wave). The PPG starts the pulse wave output and
does not stop until the operation stop is set.
Figure 17.3-1 shows the output waveform in the PPG output operation.
Figure 17.3-1 Output Waveform in the PPG Output Operation
PEN
Output pin PPG
Relation between Reload Value and Pulse Width
The written value in the reload register added to "1" and multiplied by the count clock cycle produces the
output pulse width. Note, therefore, that the pulse width is one count clock cycle when the reload register
value is 00
H
PPG operation. Note also that the pulse width is the 256 count clock cycles when the reload register value
is FF during the 8-bit PPG operation and the pulse width is the 65536 divisions of count clock when the
H
reload register value is FFFF
width are shown below:
=T • (L+1)
P
L
=T • (H+1)
P
H
P : Width of "L" pulse
L
P : Width of "H" pulse
H
T: Clock Cycle
L:PRLL value
H:PRLH value
Operation start by PEN (from "L" side)
T × (L + 1) T × (H + 1)
(START)
during the 8-bit PPG operation or when the reload register value is 0000
during the 16-bit PPG operation. The equations for calculating the pulse
H
CHAPTER 17 8/16-BIT PPG TIMER
L : PRLL value
H : PRLH value
T : Peripheral clock
(by Clock select of PPGC)
during the 16-bit
H
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