Outline Of Clock - Fujitsu F2MC-16LX Hardware Manual

16-bit microcontroller mb90330 series
Hide thumbs Also See for F2MC-16LX:
Table of Contents

Advertisement

CHAPTER 5 CLOCK
5.1

Outline of Clock

The clock generation section controls operation of the internal clock which is the
operation clock for the CPU and peripheral functions. The following are four kinds of the
clock.
• Machine clock: Internal clock.
• Machine cycle: 1 cycle of machine clock.
• Oscillation clock: Clock provided via a high-speed oscillation pin.
• PLL clock: Clock generated by internal PLL oscillation.
• Sub clock: A clock frequency divided by 4 on the clock provided via the low speed
oscillation pin.
Overview of Clock
The clock generation section, containing an oscillator circuit, can generate the oscillation and sub clocks by
being connected with an external oscillator. Clock generated externally can be input and used as the
oscillation clock. The generator, also containing a PLL clock frequency multiplication circuit, can generate
three frequency multiplication clocks of the oscillation clock. The clock generation section controls the
oscillation stabilization wait time, controls the PLL clock multiplication and controls the internal clock
operation by clock switching with the clock selector.
Oscillation clock (HCLK)
This clock is generated by connecting an oscillator or inputting an external clock to the high-speed
oscillation pins.
Sub clock (SCLK)
It is a clock which operates the watch timer. Moreover, it is available as a low-speed machine clock.
A clock frequency divided by 4 on the clock which is generated by connecting an oscillator or inputting an
external clock to the low-speed oscillation pin.
Main clock (MCLK)
It is an oscillation clock frequency divided by 2 and an input clock to the timebase timer and clock selector.
PLL clock (PCLK)
An oscillation clock which is obtained by frequency multiplication through the internal PLL clock
frequency multiplication circuit (PLL oscillator circuit). Three kinds of clocks can be selected.
Machine clock (φ)
Operation clock for CPU and peripheral functions. One cycle of this clock is used as machine cycle (1/φ).
A desired clock can be selected from among the main clock, that is, an oscillation clock frequency divided
by 2, the sub clock, and the three frequency multiplication clocks.
126

Advertisement

Table of Contents
loading

Table of Contents