Ep1 To Ep5 Control Register (Ep1C To Ep5C) - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 13 USB FUNCTION
13.3.3

EP1 to EP5 Control Register (EP1C to EP5C)

EP1 to EP5 control register (EP1C to EP5C) controls concerning end point 1 to 5.
EP1 to EP5 Control Register (EP1C to EP5C)
Figure 13.3-5 shows the bit configuration of the EP1C to EP5C control register (EP1C to EP5C).
Figure 13.3-5 EP1 to EP5 Control Register (EP1C to EP5C)
Address bit
7
EP1C 0000D4
H
0
R/W
Address bit 7
EP2C 0000D6 Reserved
H
EP3C 0000D8
H
0
EP4C 0000DA
H
R/W
EP5C 0000DC
H
Address bit 15
EP1C 0000D5 EPEN
H
0
R/W
Address bit 15
EP2C 0000D7 EPEN
H
EP3C 0000D9
H
0
EP4C 0000DB
H
R/W
EP5C 0000DD
H
Note:
Ensure that you must set the EP1 to EP5 control registers (EP1C to EP5C), except DMAE, NULE,
and STAL, when both bit 7 RST of the UDC control register (UDCC) and bit 15 BFINI of the EP0 to
EP5 status registers (EP1S to EP5S) are 1 and must not rewrite them while the USB is operating.
The following describes the function of each bit in the EP1 to EP5 control register (EP1C to EP5C).
276
6 5 4
PKS1
0 0 0
R/W R/W R/W
6 5 4
1 0 0
R/W R/W R/W
14 13 12
TYPE DIR
1 1 0
R/W R/W R/W
14 13 12
TYPE DIR
1 1 0
R/W R/W R/W
3 2
0 0
R/W R/W R/W
3 2
PKS5 to PKS2
0 0
R/W R/W R/W
11 10
DMAE NULE STAL
0 0
R/W R/W R/W
11 10
DMAE NULE STAL
0 0
R/W R/W R/W
1 0
←
0 0
Initial value
←
R/W
Access
1 0
←
0 0
Initial value
←
R/W
Access
9 8
PKS1
←
0 1
Initial value
←
R/W
Access
9 8
Reserved
←
0 0
Initial value
←
R/W
Access