Fujitsu F2MC-16LX Hardware Manual page 418

CHAPTER 16 16-BIT RELOAD TIMER
Operation of One-shot mode
When the counter value underflows ("0000
this moment, if the underflow request flag bit (UF) is set to "1" and the interrupt request output permission
bit (INTE) is "1", the interrupt request is generated. In addition, the rectangular waveform indicating the
count operation can be output from the TOT pin.
Figure 16.3-11 shows Counter operation (event count mode) at single shot mode.
Figure 16.3-11 Counter Operation (Event Count Mode) at Single Shot Mode
Count clock
Counter
Data load
signal
UF bit
CNTE bit
TRG bit
T*
TOT pin
T: Machine cycle
*: It takes 1T time from trigger input to loading of reload data.
Note:
Use the 4/φ or more "H" width and "L" width of the clock to be input to the TIN pin.
402
−1
Reload 0000 FFFF
H
data
Start trigger input wait
" → "FFFF
"), the counter stops in the state of "FFFF
H H
−1
Reload
H
data
0000 FFFF
H H
". At
H