Fujitsu F2MC-16LX Hardware Manual page 469

ADCS1 EQU 000041H
ADCR0 EQU 000042H
ADCR1 EQU 000043H
TMCSR1L EQU 000062H
TMCSR0H EQU 000063H
TMRLR0L EQU 000064H
TMRLR0H EQU 000065H
;----------Main Program------------------------------------------------------------
CODE CSEG
START:
AND CCR,#0BFH
MOV ICR12, #08H
MOV BAPL, #00H
MOV BAPM, #06H
MOV BAPH, #00H
MOV ISCS, #18H
MOV IOAL, #42H
MOV IOAH, #00H
MOV DCTL, #06H
MOV DCTH, #00H
MOV DDR7, #00000000B
MOV ADER0, #00111000B
MOV ADMR, #035H
MOV ADCS0, #080H
MOV ADCS1, #0A8H
MOVW TMRLR0L, #0320H
MOV TMCSR0H, #00H
MOV TMCSR0L, #12H
MOV TMCSR0L, #13H
MOV ILM, #07H
OR CCR, #40H
LOOP: MOV A,#00H
MOV A,#01H
CHAPTER 19 8/10-BIT A/D CONVERTER
;
; A/D data register
;
; Timer control status register 0 Low
;
; Reload Register 0
;
; Stack pointer (SP), etc. shall be initialized.
; Disables the interrupt.
; Interrupt level 0 (the strongest), Interrupt enabled
; Setting the converted data storage address
; (uses 600 to 60B )
H H
;
; Transferring the word data, Transferred address +,
; I/O → Transfer to the memory
; As forwarding former address pointer
; Setting analog data register address
2
; EI OS transfer for 6 times, Transfer for 3ch x 2
; times
; P70 to P77 are set in the input.
; P73/AN3 to P75/AN5are set in the analog input.
; AN3 to AN5 CH are converted.
; Continuous mode
; Starting the 16-bit timer, Starting the A/D
; conversion, Interrupting permission
; Setting the timer value 800 (320
; Setting the clock source to 83 ns, External trigger
; Interdiction
; Disabling the timer output, Disabling the interrupt,
; Enabling the reload
; 16-bit timer startup
; Sets ILM in PS to level 7
; Interruption permission
; Infinite loop
) 66 ms
H
453