Fujitsu F2MC-16LX Hardware Manual page 173

16-bit microcontroller mb90330 series
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Note:
When handling an interrupt, the CPU usually services the interrupt after executing the instruction that
follows the one specifying the watch mode. However, if the transition to the watch mode and the
receipt of the external bus hold request occur at the same time, transition to interruption procedure
may be made before execution of the next instruction.
Figure 6.5-2 shows the cancellation operation of the watch mode.
RST Pin
Watch mode
Main clock
PLL clock
Sub clock
CPU clock
CPU operation
Figure 6.5-2 Cancellation of Watch Mode (External Reset)
suspension
Watch mode cancellation
CHAPTER 6 LOW-POWER CONSUMPTION MODE
Oscillation stabilizing wait
oscillation
suspension
oscillation
suspension
Main clock
suspension
Reset sequence
Reset cancellation
Processing
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