Fujitsu F2MC-16LX Hardware Manual page 150

CHAPTER 5 CLOCK
Table 5.3-1 Functions of Clock Select Register (CKSCR) Bits (2/2)
Bit name
CS1, CS0:
bit 9
Multiplier
bit 8
selection bit
HCLK: Oscillation clock
134
• Bit for selecting the multiply factor for PLL clock.
• The multiplier can be selected from among three options.
• Initialized to "00
" by every reset cause.
B
Note:
When the MCS or MCM is "0", writing to these bits is not allowed. Rewrite the CS1 and CS0 bits
after setting the MCS bit to "1" once. "11
Functions
" is a set interdiction.
B