Fujitsu F2MC-16LX Hardware Manual page 442

CHAPTER 18 DTP/EXTERNAL INTERRUPT
Figure 18.3-2 Timing to Cancel the External Interrupt Request at the DTP Operation Termination
Interrupt factor
Internal operation
Address bus pin
Data bus pin
Read signal
Write signal
IRQ
When transfer is terminated,
withdraw within 3-machine cycle
426
Edge request or H level request
Descriptor
select/read
Figure 18.3-3 Example of an External Peripheral Interface
Data, Address, Bus
DTP
MB90330
Note : µDMAC
I/O register At memory transfer
Read address Write address
Read data Write data
Withdraw within 3-machine cycle.
Internal bus
INT
CORE MEMORY