Fujitsu F2MC-16LX Hardware Manual page 162

CHAPTER 6 LOW-POWER CONSUMPTION MODE
CPU intermittent operation selector
The CPU intermittent operation sector selects the number of the suspended clocks in the CPU intermittent
operation mode.
Standby controller circuit
The standby controller circuit controls the CPU clock control circuit and the peripheral clock control
circuit, and then performs the transition to the low-power consumption mode or cancellation.
CPU clock controller circuit
The CPU clock controller circuit controls the clock supplied to CPU.
Peripheral clock controller circuit
The peripheral clock controller circuit controls the clock supplied to the peripheral functions.
Pin high-impedance controller circuit
The pin high-impedance controller circuit makes the external pin to the high-impedance while the mode is
in the timebase timer mode and the stop mode. For the pin to which pull-up option is selected, you need to
cut the pull-up resistance during the stop mode.
Internal reset generator circuit
This circuit generates internal reset signals.
Low-power consumption mode control register (LPMCR)
The low-power consumption mode control register (LPMCR) shifts to/cancels the standby mode or sets the
CPU intermittent operation function.
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