Fujitsu F2MC-16LX Hardware Manual page 643

Accumulator indirect (@A)
Memory is accessed using the address indicated by the contents of the low-order bytes (16 bits) of the
accumulator (AL). Bit 23 to Bit 16 of the register are specified in the mnemonic code by the program bank
register (DTB).
Figure B.4-10 Example of Accumulator Indirect Branch Addressing (@A)
MOVW A, @A
Before execution
After execution
Accumulator indirect branch address (@A)
The address of the branch destination is the content (16 bits) of the low-order bytes (AL) of the
accumulator. Indicates the branch destination in the bank space. Bit 23 to Bit 16 are specified by the
program bank register (PCB). However, for the JCTX (JumpContext) instruction, Bit 23 to Bit 16 of the
address are specified by the data bank register (DTB). This addressing mode is used for unconditional
branch instructions.
Figure B.4-11 Example of Accumulator Indirect Branch Addressing (@A)
(This instruction causes an unconditional branch
JMP @A
by accumulator indirect branch addressing.)
Before execution
After execution
Indirectly-specified branch address (@ear)
The address of the branch destination is the word data at the address indicated by ear.
Figure B.4-12 Example of Indirect Specification Branch Addressing (@ear)
JMP @@RW0
Before execution
After execution
(This instruction reads data by accumulator indirect
addressing and stores it in A.)
A 0 7 1 6 2 5 3 4
DTB B B
A 0 7 1 6 F F E E
DTB B B
PC 3 C 2 0 PCB
A 6 6 7 7 3 B 2 0
PC 3 B 2 0 PCB
A 6 6 7 7 3 B 2 0
(This instruction causes an unconditional branch
by register indirect addressing.)
PC 3 C 2 0 PCB
PW0 7 F 4 8 DTB
PC 3 B 2 0 PCB
PW0 7 F 4 8 DTB
Memory space
BB2535 F F
H
BB2534 E E
H
Memory space
4 F
4F3C20 6 1
H
Next
4F3B20
4 F
H instruction
JMP @A
Memory space
4 F
4F3C21 0 8
H
4F3C20 7 3
H
2 1
Next
4F3B20
H
instruction
4 F
217F49 3 B
H
2 1
217F48 2 0
H
JMP @@RW0
Appendix B Instruction
627