Fujitsu F2MC-16LX Hardware Manual page 197

Operation of External Pin in Each Mode
Table 7.3-4 shows the operation relation of each external pin in the non-multiplex mode and the multiplex
mode.
Table 7.3-4 Operation Relation of External Pin in Each Mode
Permission (Address)
External bus expansion
8 bits
P07 to P00/
D07 to D00/
AD07 to AD00
P17 to P10/
D15 to D08/ Port
AD15 to AD08
P27 to P20 A23 to A16
P37 to P30 A07 to A00
P47 to P40 A15 to A08
ALE
RD
P52/WRL
P53/WRH Port
P54/HRQ
P55/HAK
P56/RDY
P57/CLK
Notes:
• The single chip mode is all available as the port.
• The upper addresses, (WRL), (WRH), (HAK), HRQ, RDY, and CLK are used as a port according to the function selection.
• While using the multiplex, you can use the upper addresses A23 to A20 as a port or PPG3 to PPG0.
• While using the non-multiplex, you may not use the reload time ch0/ch1/ch2, UART ch0/ch1. It works as an address.
Non- multiplex mode
External Address control
Prohibit (port)
External bus expansion
16 bits 8 bits
D07 to D00
D15 to D08 Port
Port
A07 to A00
A15 to A08
ALE
RD
WRL
WRH Port
HRQ
HAK
RDY
CLK
Functions
Permission (Address)
External bus expansion
16 bits 8 bits
D15 to D08 A15 to A08
A23 to A16
WRH Port
CHAPTER 7 MODE SETTING
Multiplex mode
External Address control
Prohibit (port)
External bus expansion
16 bits 8 bits
AD07 to AD00
AD15 to
A15 to A08
AD08
Port
Port
ALE
RD
WRL
WRH Port
HRQ
HAK
RDY
CLK
16 bits
AD15 to
AD08
WRH
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