Hitachi H8S/2633 Hardware Manual page 52

Instruction Set: All instructions and addressing modes can be used. Only the lower 16 bits of

effective addresses (EA) are valid.

Exception Vector Table and Memory Indirect Branch Addresses: In normal mode the top area

starting at H'0000 is allocated to the exception vector table. One branch address is stored per 16

bits (figure 2-2). The exception vector table differs depending on the microcontroller. For details

of the exception vector table, see section 4, Exception Handling.

The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions uses

an 8-bit absolute address included in the instruction code to specify a memory operand that

contains a branch address. In normal mode the operand is a 16-bit word operand, providing a 16-

bit branch address. Branch addresses can be stored in the top area from H'0000 to H'00FF. Note

that this area is also used for the exception vector table.

Power-on reset exception vector

Manual reset exception vector

(Reserved for system use)

Exception vector 1

Exception vector 2

Figure 2-2 Exception Vector Table (Normal Mode)

vector table