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Item
Operating modes
Clock pulse
generator
Packages
2
I
C bus interface
(IIC) 2 channels
(optional)
Product lineup
Note: * In the planning stage.
Specification
Four MCU operating modes
CPU
Operating
Mode
Mode
4
Advanced
5
6
7
•
On-chip PLL circuit (×1, ×2, ×4)
•
Input clock frequency: 2 to 25 MHz
•
120-pin plastic TQFP (TFP-120)
•
128-pin plastic QFP (FP-128)
•
2
Conforms to I
C bus interface type advocated by Philips
•
Single master mode/slave mode
•
Possible to determine arbitration lost conditions
•
Supports two slave addresses
Model Name
Mask ROM Version
HD6432633*
HD6432632*
HD6432631*
Description
On-chip ROM disabled
expansion mode
On-chip ROM disabled
expansion mode
On-chip ROM enabled
expansion mode
Single-chip mode
F-ZTAT Version
HD64F2633
—
—
External Data Bus
On-Chip
Initial
ROM
Value
Disabled
16 bits
Disabled
8 bits
Enabled
8 bits
Enabled
—
ROM/RAM (Bytes)
256 k/16 k
192 k/12 k
128 k/8 k
Maximum
Value
16 bits
16 bits
16 bits
—
Packages
TFP-120
FP-128
TFP-120
FP-128
TFP-120
FP-128
5
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