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PRODUCT OVERVIEW
Signal
AC_SDI0
AC_SDO0
PCM
PCM0_SCLK
PCM0_FSYNC
PCM0_SDI
PCM0_SDO
PCM0_CDCLK
USB Host
DN
DP
USB Device
DM_UDEV
DP_UDEV
REXT
XO_UDEV
XI_UDEV
SPI
SPIMISO
SPIMOSI
SPICLK
nSS
SDMMC Interface
SD1_DAT[3:0]
SD1_CMD
SD1_CLK
SD0_DAT[3:0]
SD0_CMD
SD0_CLK
General Port
GPn[137:0]
TIMMER/PWM
TOUT[3:0]
TCLK
1-26
In/Out
I
Serial, time division multiplexed, AC'97 input stream
O
Serial, time division multiplexed, AC'97 output stream
O
Serial shift clock
O
Serial data indicator and synchronizer
I
Serial PCM input data
O
Serial PCM output data
I
Optional External Clock source
IO
DATA(–) from USB host. (Need to 15kΩ pull-down)
IO
DATA(+) from USB host. (Need to 15kΩ pull-down)
IO
DATA(–) for USB peripheral.
IO
DATA(+) for USB peripheral.
O
External Resistor ( 44.2ohm +/- 1%)
OSC
Crystal output
OSC
Crystal input
IO
SPIMISO is the master data input line, when SPI is configured as a
master.
When SPI is configured as a slave, these pins reverse its role.
IO
SPIMOSI is the master data output line, when SPI is configured as a
master.
When SPI is configured as a slave, these pins reverse its role.
IO
SPI clock
I
SPI chip select (only for slave mode)
IO
SD1 receive/transmit data
IO
SD1 receive response/ transmit command
O
SD1 clock
IO
SD0 receive/transmit data
IO
SD0 receive response/ transmit command
O
SD0 clock
IO
General input/output ports, which are multiplexed with other function pins
(some ports are output only).
O
Timer output[3:0]
I
External timer clock input
S3C2416X RISC MICROPROCESSOR
Description
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