Interrupt Offset (Intoffset) Register - Samsung S3C2416 User Manual

INTERRUPT CONTROLLER

2.5 INTERRUPT OFFSET (INTOFFSET) REGISTER

The value in the interrupt offset register shows, which interrupt request of IRQ mode is in the INTPND register.
This bit can be cleared automatically by clearing SRCPND and INTPND.
Register Address
INTOFFSET1 0X4A000014
INTOFFSET2 0X4A000054
INT Source for group 1
INT_ADC
INT_RTC
Reserved
INT_UART0
INT_IIC0
INT_USBH
INT_USBD
INT_NAND
INT_UART1
INT_SPI0
INT_SDI0
INT_SDI1
Reserved
INT_UART3
INT_DMA
INT_LCD
INT Source for group 2
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
10-18
R/W
R Indicate the IRQ interrupt request source for group 1
R Indicate the IRQ interrupt request source for group 2
The OFFSET Value
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
The OFFSET Value
31
30
29
28
27
26
25
24
23
22
21
20
Description
INT Source for group 1
INT_UART2
INT_TIMER4
INT_TIMER3
INT_TIMER2
INT_TIMER1
INT_TIMER0
INT_WDT/AC97
INT_TICK
nBATT_FLT
Reserved
EINT8_15
EINT4_7
EINT3
EINT2
EINT1
EINT0
INT Source for group 2
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
INT_I2S0
Reserved
INT_PCM0
S3C2416X RISC MICROPROCESSOR
Reset Value
0x00000000
0x00000000
The OFFSET Value
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
The OFFSET Value
15
14
13
12
11
10
9
8
7
6
5
4