Bus Matrix & Ebi; Overview - Samsung S3C2416 User Manual

16/32-bit risc
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S3C2416X RISC MICROPROCESSOR
3
BUS MATRIX & EBI

1 OVERVIEW

S3C2416 MATRIX provides the interface between dual AHB bus and Memory sub-system. It is used for achieving
high system performance by accessing various kinds of memory (SDRAM, SRAM, Flash Memory, ROM etc) from
different AHB bus (one is for system and the other is for image) at the same time. S3C2416 have two MATRIX
cores because it has two memory ports, and each MATRIX can select the priority between rotation type and fixed
type. User can select which one is excellent for improving system performance.
AHB-S
AHB-I
Figure 3-1. The Configuration of MATRIX and Memory Sub-System of S3C2416
Matrix
Memory Controller & EBI
SFR
MATRIX
CORE0
MATRIX
CORE1
IROM
SSMC
NFCON
EBI
DRAMC
BUS MATRIX & EBI
External Memory
SROM
NFLASH
SDRAM
3-1

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