Abort Transaction - Samsung S3C2416 User Manual

HSMMC CONTROLLER S3C2416X RISC MICROPROCESSOR
(10) Wait for the Transfer Complete Interrupt and DMA Interrupt.
(11) If Transfer Complete(STATRANCMPLT) is set 1, go to Step (14) else if DMA Interrupt is set to 1, go to Step
(12). Transfer Complete is higher priority than DMA Interrupt.
(12) Write 1 to the DMA Interrupt in the Normal Interrupt Status register to clear this bit.
(13) Set the next system address of the next data position to the System Address register and go to Step (10).
(14) Write 1 to the Transfer Complete and DMA Interrupt in the Normal Interrupt Status register to clear this bit.
NOTE: Step (2) and Step (3) can be executed simultaneously. Step (5) and Step (6) can also be executed simultaneously.

4.12 ABORT TRANSACTION

An abort transaction is performed by issuing CMD12 for a SD memory card and by issuing CMD52 for a SDIO
card. There are two cases where the Host Driver needs to do an Abort Transaction. The first case is when the
Host Driver stops Infinite Block Transfers. The second case is when the Host Driver stops transfers while a
Multiple Block Transfer is executing.
There are two ways to issue an Abort Command. The first is an asynchronous abort. The second is a
synchronous abort. In an asynchronous abort sequence, the Host Driver can issue an Abort Command at anytime
unless Command Inhibit (CMD) in the Present State register is set to 1. In a synchronous abort, the Host Driver
shall issue an Abort Command after the data transfer stopped by using Stop At Block Gap Request in the Block
Gap Control register.
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