Reset Control Registers (Swrst And Rstcon) - Samsung S3C2416 User Manual

S3C2416X RISC MICROPROCESSOR
8.4

RESET CONTROL REGISTERS (SWRST AND RSTCON)

Software can reset S3C2416 using SWRST register. The waveform of the reset signals are determined by
RSTCON register.
Register
SWRST 0x4C00_0044
RSTCON 0x4C00_0064
When software write the predefined value, 0x533C2416, into SWRST register, then the system controller asserts
internal reset signal and initializes internal state.
SWRST
SWRST
RSTCON register controls the duration of the system reset signal.
RSTCON
RESERVED
RESERVED
PWROFF_SLP
RSTCNT
PWRSETCNT
Address R/W
R/W
R/W
Bit
[31:0] If this field has 0x533C2416, then the system will restart.
Bit
[31:19] -
[18:17] Should be set '0x3'
Power Control on pad retention cell I/O.
Retention cell I/O's power will be off when sleep mode, but
when wakeup process starts, User should write '1' to produce
[16]
power on retention I/O (see below detailed description)
1 = set automatically when sleep mode.
0 = cleared by user writing '1'
Only watch dog and software reset can start counter which is
counted from RSTCNT value. This RSTCNT value effects
delay of releasing reset. After this counter expired, internal
[15:8]
reset (like HRESETn) will be HIGH state.
Range which user can configure is from 0x01 to 0xFE.
(Don't write 0xFF to this field)
This field configures value of Power Settle Down Counter.
Only When waking up from sleep mode, Power Settle Down
Counter starts counting to wait for stability of external voltage
source. As soon as counter reaches PWRSETCNT value, the
[7:0]
system escapes from sleep mode.
Range which user can configure is from 0x01 to 0xFE.
(Don't write 0xFF to this field)
Real count number = (PWRSETCNT[7:0] + 1) * 2048
Description
Software reset control register
Reset control register
Description
Description
SYSTEM CONTROLLER
Reset Value
0x0000_0000
0x0006_0101
Initial Value
0x0000_0000
Initial Value
0x0000
0x3
0
0x01
0x01
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