Samsung S3C2416 User Manual page 52

16/32-bit risc
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PRODUCT OVERVIEW
Signal
nRBE[1:0]
nWAIT
SDRAM I/F
SADDR[15:0]
SDATA[31:0]
nSRAS
nSCAS
nSWE
nSCS[1:0]
DQM[3:0]
DQS[1:0]
SCLK
nSCLK
SCKE
NAND Flash
FCLE
FALE
nFCE
nFRE
nFWE
FRnB
SMC/OneNAND
RSMCLK
RSMVAD
RSMBWAIT
LCD Control Unit
RGB_VD/SYS_VD[23:0]
RGB_VCLK/SYS_WR
RGB_VSYNC/SYS_CS1
RGB_HSYNC/SYS_CS0
RGB_VDEN/SYS_RS
1-24
In/Out
O
Upper byte/lower byte enable (In case of 16-bit SRAM)
I
nWAIT requests to prolong a current bus cycle. As long as nWAIT is L,
the current bus cycle cannot be completed. If nWAIT signal isn't used in
your system, nWAIT signal must be tied on pull-up resistor.
O
SDRAM Address bus
IO
SDRAM Data Bus
O
SDRAM row address strobe
O
SDRAM column address strobe
O
SDRAM write enable
O
SDRAM chip select
O
SDRAM data mask
O
mDDR/DDR2 Data Strobe
O
SDRAM clock
O
mDDR/DDR2 Conversion clock
O
SDRAM clock enable
O
Command latch enable
O
Address latch enable
O
Nand flash chip enable
O
Nand flash read enable
O
Nand flash write enable
I
Nand flash ready/busy
I/O
SMC Clock
O
SMC Address Valid
O
SMC Burst Wait
O
RGB I/F Video Data: RGB_VD[23:0]
i80 I/F Video DataSYS_VD[17:0]
O
RGB I/F LCD Clock
i80 I/F Write Enable
O
RGB I/F Vertical Sync. Signal
i80 I/F Sub LCD Select
O
RGB I/F Horizontal Sync. Signal
i80 I/F Main LCD Select
O
RGB I/F Data Enable
i80 I/F Register/ State select
S3C2416X RISC MICROPROCESSOR
Description

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