Samsung S3C2416 User Manual page 53

S3C2416X RISC MICROPROCESSOR
Signal
RGB_LEND/SYS_OE
Interrupt Control Unit
EINT[15:0]
External I/F
nXDREQ[1:0]
nXDACK[1:0]
nXBREQ
nXBACK
UART
RXD[3:0]
TXD[3:0]
nCTS[2:0]
nRTS[2:0]
EXTUARTCLK
TSADC
AIN[9:0]
Vref
IIC-Bus
IICSDA
IICSCL
IIS-Multi Audio Interface
I2SLRCK
I2SSCLK
I2SCDCLK
I2SSDI
I2SSDO
I2SSDO_1
I2SSDO_2
AC'97
AC_nRESET
AC_SYNC
AC_BIT_CLK0
In/Out
O RGB I/F Line End Signal
i80 I/F Output Enable
I External interrupt request
I External DMA request
O External DMA acknowledge
I nXBREQ (Bus Hold Request) allows another bus master to request
control of the local bus. nXBACK active indicates that bus control has
been granted.
O nXBACK (Bus Hold Acknowledge) indicates that the S3C2416X has
surrendered control of the local bus to another bus master.
I UART receives data input (ch. 0/1/2)
O UART transmits data output (ch. 0/1/2)
I UART clear to send input signal (ch. 0/1)
O UART request to send output signal (ch. 0/1)
I External clock input for UART
AI ADC input [9:0]. If do not use ADC function, AIN [9] and AIN [7] pins are
tied to VDDA_ADC. Others are tied to GND.
When touch screen device is used, A[6], A[7] , A[8] and A[9] are used as
YM, YP, XM and XP, respectively.
AI ADC reference voltage
IO IIC-bus data
IO IIC-bus clock
IO IIS-bus channel select clock
IO IIS-bus serial clock
IO CODEC system clock
I IIS-bus serial data input
O IIS-bus serial data output(Front Left, Right)
O IIS-bus serial data output(Front Center, LFE)
O IIS-bus serial data output(Rear Left, Right)
IO AC'97 Master H/W Reset
IO 12.288MHz serial data clock
O 48kHz fixed rate sample sync
Description
PRODUCT OVERVIEW
1-25