Command Complete Sequence - Samsung S3C2416 User Manual

HSMMC CONTROLLER
(1) Check Command Inhibit (CMD) in the Present State register. Repeat this step until Command Inhibit (CMD) is
0. That is, when Command Inhibit (CMD) is 1, the Host Driver shall not issue a SD Command.
(2) If the Host Driver issues a SD Command with busy signal, go to step (3). If without busy signal, go to step (5).
(3) If the Host Driver issues an abort command, go to step (5). In the case of no abort command, go to step (4).
(4) Check Command Inhibit (DAT) in the Present State register. Repeat this step until Command Inhibit (DAT) is
0.
(5) Set the value corresponding to the issued command in the Argument register.
(6) Set the value corresponding to the issued command in the Command register.
NOTE: Writing the upper byte in the Command register causes a SD command to be issued.
(7) Perform Command Complete Sequence

4.10 COMMAND COMPLETE SEQUENCE

The sequence for completing the SD Command is shown in Figure 20-10. There is a possibility that the errors
(Command Index/End bit/CRC/Timeout Error) occur during this sequence.
(1) Wait for the Command Complete Interrupt. If the Command Complete Interrupt has occurred, go to step (2).
(2) Write 1 to Command Complete(STACMDCMPLT) in the Normal Interrupt Status register to clear this bit.
(3) Read the Response register and get necessary information in accordance with the issued command.
(4) Judge whether the command uses the Transfer Complete Interrupt or not. If it uses Transfer Complete, go to
step (5). If not, go to step (7).
(5) Wait for the Transfer Complete Interrupt. If the Transfer Complete Interrupt has occurred, go to step (6).
(6) Write 1 to Transfer Complete(STATRANCMPLT) in the Normal Interrupt Status register to clear this bit.
(7) Check for errors in Response Data. If there is no error, go to step (8). If there is an error, go to step (9).
(8) Return Status of "No Error".
(9) Return Status of "Response Contents Error".
NOTES:
1. While waiting for the Transfer Complete interrupt, the Host Driver shall only issue commands that do not use the busy
signal.
2. The Host Driver shall judge the Auto CMD12(Stop Command) complete by monitoring Transfer Complete.
3. When the last block of un-protected area is read using memory multiple blocks read command (CMD18),
OUT_OF_RANGE error may occur even if the sequence is correct. The Host Driver should ignore it. This error will appear
in the response of Auto CMD12 or in the response of the next memory command.
20-10
S3C2416X RISC MICROPROCESSOR