Uart Dividing Slot Register - Samsung S3C2416 User Manual

S3C2416X RISC MICROPROCESSOR

3.12 UART DIVIDING SLOT REGISTER

There are four UART dividing slot registers including UDIVSLOT0, UDIVSLOT 1, UDIVSLOT 2 and UDIVSLOT in
the UART block.
Register
UDIVSLOT0 0x5000002C
UDIVSLOT1 0x5000402C
UDIVSLOT2 0x5000802C
UDIVSLOT3 0x5000C02C
UDIVSLOTn
UDIVSLOT [15:0]
Floating point part
0
0.0625
0.125
0.1875
0.25
0.3125
0.375
0.4375
0.5
0.5625
0.625
0.6875
0.75
0.8125
0.875
0.9375
Address R/W
R/W Baud rate divisior(decimal place) register 0
R/W Baud rate divisior(decimal place) register 1
R/W Baud rate divisior(decimal place) register 2
R/W Baud rate divisior(decimal place) register 3
Bit
Select the slot number in Table 14-4
Table 14-4. Recommended Value Table of DIVSLOTn Register
Num of 1's
Description
Description
0 0x0000(0000_0000_0000_0000b)
1 0x0080(0000_0000_0000_1000b)
2 0x0808(0000_1000_0000_1000b)
3 0x0888(0000_1000_1000_1000b)
4 0x2222(0010_0010_0010_0010b)
5 0x4924(0100_1001_0010_0100b)
6 0x4A52(0100_1010_0101_0010b)
7 0x54AA(0101_0100_1010_1010b)
8 0x5555(0101_0101_0101_0101b)
9 0xD555(1101_0101_0101_0101b)
10 0xD5D5(1101_0101_1101_0101b)
11 0xDDD5(1101_1101_1101_0101b)
12 0xDDDD(1101_1101_1101_1101b)
13 0xDFDD(1101_1111_1101_1101b)
14 0xDFDF(1101_1111_1101_1111b)
15 0xFFDF(1111_1111_1101_1111b)
UDIVSLOTn
UART
Reset Value
0x0000
0x0000
0x0000
0x0000
Initial State
−
14-23