S3C2416X RISC MICROPROCESSOR
5
STATIC MEMORY CONTROLLER (SMC)
1 OVERVIEW
The SMC provides simultaneous support for up to six memory banks (bank0 to bank5) that you can configure
independently. Each memory bank supports:
•
SRAM
•
ROM
•
Flash EPROM
•
Burst SRAM, ROM, and flash
•
OneNAND
You can configure each memory bank to use 8 or 16-bit external memory data paths. You can configure the SMC
to support either little-endian or big-endian operation. For example, each memory bank can be configured to
support:
•
nonburst read and write accesses to high-speed CMOS asynchronous static RAM
•
nonburst write accesses, nonburst read accesses, and asynchronous page mode read accesses to fast-boot
block flash memory
•
synchronous single and burst read and write accesses to synchronous static RAM.
STATIC MEMORY CONTROLLER
5-1