Samsung S3C2416 User Manual page 559

S3C2416X RISC MICROPROCESSOR
WINCON1
ENWIN_F
8.1.10 Window 0 Position Control A Register
Register
VIDOSD0A 0x4C800028
VIDOSD0A
OSD_LeftTopX_F
OSD_LeftTopY_F
8.1.11 Window 0 Position Control B Register
Register
VIDOSD0B
VIDOSD0B
OSD_RightBotX_F
OSD_RightBotY_F
NOTE: Registers must have word boundary X position.
So, 24bpp mode should have X position by 1 pixel. ( ex, X = 0,1,2,3....)
16bpp mode should have X position by 2 pixel. ( ex, X = 0,2,4,6....)
8bpp mode should have X position by 4 pixel. ( ex, X = 0,4,8,12....)
Bit
Per pixel blending case( BLD_PIX ==1)
0 = selected by AEN bit in frame buffer for each pixel or Key area
KEYBLEND
(W1KEYCON0[26])
1 = using DATA[27:24] in frame buffer, only for 28bpp mode
[0] Window1 on/ off control
0 = Off window1
1 = On window1
Address R/W
R/W Video Window 0's position control register
Bit
[21:11] Horizontal screen coordinate for left top pixel of OSD image
[10:0] Vertical screen coordinate for left top pixel of OSD image
Address R/W
0x4C80002C R/W
Bit
[21:11] Horizontal screen coordinate for right bottom pixel of OSD
image
[10:0] Vertical screen coordinate for right bottom pixel of OSD image
Description
AEN = 0
0
AEN = 1
Non-Key area
1
Key area
Description
Description
Description
Video Window 0's position control register
Description
LCD CONTROLLER
ALPHA0_R/G/B
ALPHA1_R/G/B
ALPHA0_R/G/B
ALPHA1_R/G/B
Initial State
0
Reset Value
0x0000_0000
Initial State
0
0
Reset Value
0x0000_0000
Initial State
0
0
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