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S3C2416X RISC MICROPROCESSOR
Name
ENSIGBUFRDRDY
ENSIGBUFWTRDY
ENSIGDMA
ENSIGBLKGAP
ENSIGSTANSCMPLT
ENSIGCMDCMPLT
Bit
[5]
Buffer Read Ready Signal Enable
1 = Enabled
0 = Masked
[4]
Buffer Write Ready Signal Enable
1 = Enabled
0 = Masked
[3]
DMA Interrupt Signal Enable
1 = Enabled
0 = Masked
[2]
Block Gap Event Signal Enable
1 = Enabled
0 = Masked
[1]
Transfer Complete Signal Enable
1 = Enabled
0 = Masked
[0]
Command Complete Signal Enable
1 = Enabled
0 = Masked
Description
HSMMC CONTROLLER
Initial Value
0
0
0
0
0
0
20-57
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