I/O PORTS
3.11 PORT M CONTROL REGISTERS (GPMCON, GPMDAT, GPMUDP)
Register
GPMCON
GPMDAT
GPMUDP
0x560000108
Reserved
0x56000010c
GPMCON
Reserved
GPM1
GPM0
GPMDAT
Reserved
GPM[1:0]
GPMUDP
Reserved
nWAIT
GPMUDP1
GPMUDP0
10-28
Address
R/W
0x56000100
R/W
0x56000104
R
R/W
−
Bit
[31:4]
Reserved
[3:2]
Others = GPM Input
10 = FRnB
[1:0]
Others = GPM Input
10 = RSMBWAIT
Bit
[31:2]
Reserved
[1:0]
When the port is configured as an input port, the corresponding bit is the pin
state
When the port is configured as functional pin, the undefined value will be read.
Bit
[31:6]
Reserved
[5:4]
[CPU:CPD]
00 = pull-up/down disable
01 = pull-down enable
10 = pull-up enable
11 = not-available
[3:2]
[CPU:CPD]
00 = pull-up/down disable
01 = pull-down enable
10 = pull-up enable
11 = not-available
[1:0]
[CPU:CPD]
00 = pull-up/down disable
01 = pull-down enable
10 = pull-up enable
11 = not-available
Description
Configures the pins of port M
The data register for port M
pull-up/down control register for port M
Description
Description
Description
S3C2416 RISC MICROPROCESSOR
−
Reset Value
0xA
0x0
0x0
−