Software Reset Register - Samsung S3C2416 User Manual

HSMMC CONTROLLER

5.17 SOFTWARE RESET REGISTER

A reset pulse is generated when writing 1 to each bit of this register. After completing the reset, the Host
Controller shall clear each bit. Because it takes some time to complete software reset, the SD Host Driver shall
confirm that these bits are 0.
Register Address
SWRST0 0X4AC0002F
SWRST1 0X4A80002F
Name Bit
[7:3]
RSTDAT [2]
RSTCMD [1]
20-44
R/W
R/W Software Reset Register (Channel 0)
R/W Software Reset Register (Channel 1)
Reserved
Software Reset For DAT Line
Only part of data circuit is reset. DMA circuit is also reset. (RWAC)
The following registers and bits are cleared by this bit:
Present State register
Buffer Read Enable
Buffer Write Enable
Read Transfer Active
Write Transfer Active
DAT Line Active
Command Inhibit (DAT)
Block Gap Control register
Continue Request
Stop At Block Gap Request
Normal Interrupt Status register
Buffer Read Ready
Buffer Write Ready
DMA Interrupt
Block Gap Event
Transfer Complete
1 = Reset
0 = Work
Software Reset For CMD Line
Only part of command circuit is reset. (RWAC)
The following registers and bits are cleared by this bit:
Present State register
Command Inhibit (CMD)
Normal Interrupt Status register
Command Complete
1 = Reset
0 = Work
Description
Description
S3C2416X RISC MICROPROCESSOR
Reset Value
Initial Value
0x0
0x0
0
0
0