BUS PRIORITIES
Priority
AHB_I BUS MASTERS
0
1
2
3
4
5
6
7
8
Priority
APB BUS MASTERS
0
1
2
3
4
5
6
7
8
4-2
Reserved
1. Fix Type: all priority can be changed according to register value
stored in The System Controller.
TFTW1-LCD
TFTW2-LCD
2 Rotation Type : all masters' priority can be rotatable according to
Reserved
register value stored in The System Controller.
Reserved
( except for Default Master)
Reserved
2D
AHB2AHB
Default
AHB2APB Bridge Master obtains always highest priority and the
AHB2APB
priority of six DMA channels rotate internally.
DMA0
DMA1
DMA2
DMA3
DMA4
DMA5
Reserved
Reserved
S3C2416X RISC MICROPROCESSOR
Comment
Comment