Samsung S3C2416 User Manual page 17

Chapter 22
1 Overview ................................................................................................................................................... 22-1
1.1 Features........................................................................................................................................... 22-1
2 ADC & Touch Screen Interface Operation................................................................................................ 22-2
2.1 Block Diagram ................................................................................................................................. 22-2
2.2 Function Descriptions ...................................................................................................................... 22-3
3 ADC and Touch Screen Interface Special Registers................................................................................ 22-5
3.1 ADC Control (ADCCON) Register................................................................................................... 22-5
3.2 ADC Touch Screen Control (ADCTSC) Register ............................................................................ 22-6
3.3 ADC Start Delay (ADCDLY) Register.............................................................................................. 22-7
3.4 ADC Conversion Data (ADCDAT0) Register .................................................................................. 22-8
3.5 ADC Conversion Data (ADCDAT1) Register .................................................................................. 22-9
3.6 ADC Touch Screen up-Down Int Check Register (ADCUPDN)...................................................... 22-9
3.7 ADC Channel Mux Register (ADCMUX) ......................................................................................... 22-10
Chapter 23
1 Overview ................................................................................................................................................... 23-1
2 Feature...................................................................................................................................................... 23-1
3 Signals ...................................................................................................................................................... 23-1
4 Block Diagram........................................................................................................................................... 23-2
5 Functional Descriptions............................................................................................................................. 23-2
5.1 Master/Slave Mode.......................................................................................................................... 23-3
5.2 DMA Transfer .................................................................................................................................. 23-4
6 Audio Serial Data Format.......................................................................................................................... 23-5
6.1 IIS-Bus Format ................................................................................................................................ 23-5
6.2 MSB (Left) Justified ......................................................................................................................... 23-5
6.3 LSB (Right) Justified........................................................................................................................ 23-5
6.4 Sampling Frequency and Master Clock .......................................................................................... 23-7
6.5 IIS Clock Mapping Table ................................................................................................................. 23-7
7 Programming Guide.................................................................................................................................. 23-8
7.1 Initialization ...................................................................................................................................... 23-8
7.2 Play Mode (TX mode) with DMA ..................................................................................................... 23-8
7.3 Recording Mode (RX mode) with DMA ........................................................................................... 23-8
7.4 Example Code ................................................................................................................................. 23-9
8 IIS-BUS Interface Special Registers......................................................................................................... 23-15
8.1 IIS Control Register (IISCON) ......................................................................................................... 23-16
8.2 IIS Mode Register (IISMOD) ........................................................................................................... 23-18
8.3 IIS FIFO Control Register (IISFIC) .................................................................................................. 23-20
8.4 IIS Prescaler Control Register (IISPSR).......................................................................................... 23-20
8.5 IIS Transmit Register (IISTXD)........................................................................................................ 23-21
8.6 IIS Receive Register (IISRXD) ....................................................................................................... 23-21
S3C2416X RISC MICROPROCESSOR
Table of Contents
ADC & Touch Screen Interface
IIS Multi Audio Interface
(Continued)
xv