Samsung S3C2416 User Manual page 443

S3C2416X RISC MICROPROCESSOR
Register
HS_SPI_TX_DATA(Ch0)
HS_SPI_TX_DATA
TX_DATA
Register
HS_SPI_RX_DATA(Ch0)
HS_SPI_RX_DATA
RX_DATA
Register
Packet_Count_reg(Ch0)
Packet_Count_reg
Packet_Count_En
Count Value
Address R/W
0x52000018 W
Bit
This field contains the data to be transmitted over the
[31:0]
HS_SPI channel.
Address R/W
0x5200001C R
Bit
This field contains the data to be received over the
[31:0]
HS_SPI channel.
Address R/W
0x52000020 R/W Count how many data master gets
Bit
Enable bit for packet count
[16]
0 = Disable
1 = Enable
[15:0] Packet count value
Description
HS_SPI TX DATA register
Description
Description
HS_SPI RX DATA register
Description
Description
Description
HS_SPI CONTROLLER
Reset Value
0x0
Initial State
32'b0
Reset Value
0x0
Initial State
32'b0
Reset Value
0x0
Initial State
1'b0
16'b0
19-11