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1 Overview ................................................................................................................................................... 19-1
2 Features .................................................................................................................................................... 19-1
3 Signal Descriptions ................................................................................................................................... 19-2
4 Operation .................................................................................................................................................. 19-2
4.1 Operation Mode............................................................................................................................... 19-3
4.2 FIFO Access.................................................................................................................................... 19-3
4.3 Trailing Bytes in the Rx FIFO .......................................................................................................... 19-3
4.4 Packet Number Control ................................................................................................................... 19-3
4.5 NCS Control .................................................................................................................................... 19-3
4.6 HS_SPI Transfer Format ................................................................................................................. 19-4
5 Special Function Register Descriptions .................................................................................................... 19-5
5.1 Setting Sequence of Special Function Register.............................................................................. 19-5
5.2 Special Function Register ............................................................................................................... 19-6
1 Overview ................................................................................................................................................... 20-1
2 Features .................................................................................................................................................... 20-1
3 Block Diagram........................................................................................................................................... 20-2
4 Sequence .................................................................................................................................................. 20-3
4.1 SD Card Detection Sequence ......................................................................................................... 20-3
4.2 SD Clock Supply Sequence ............................................................................................................ 20-4
4.3 SD Clock Stop Sequence ................................................................................................................ 20-5
4.4 SD Clock Frequency Change Sequence ........................................................................................ 20-5
4.5 SD Bus Power Control Sequence ................................................................................................... 20-6
4.6 Change Bus Width Sequence ......................................................................................................... 20-7
4.7 Timeout Setting for DAT Line .......................................................................................................... 20-8
4.8 SD Transaction Generation............................................................................................................. 20-8
4.9 SD Command Issue Sequence ....................................................................................................... 20-9
4.10 Command Complete Sequence .................................................................................................... 20-10
4.11 Transaction Control with Data Transfer Using DAT Line .............................................................. 20-12
4.12 Abort Transaction .......................................................................................................................... 20-16
5 SDI Special Registers ............................................................................................................................... 20-17
5.1 Configuration Register Types.......................................................................................................... 20-17
5.2 SDMA System Address Register .................................................................................................... 20-18
5.3 Block Size Register ......................................................................................................................... 20-19
5.4 Block Count Register....................................................................................................................... 20-21
5.5 Argument Register........................................................................................................................... 20-22
5.6 Transfer Mode Register................................................................................................................... 20-23
5.7 Command Register.......................................................................................................................... 20-25
5.8 Response Register .......................................................................................................................... 20-27
5.9 Buffer Data Port Register ................................................................................................................ 20-29
5.10 Present State Register .................................................................................................................. 20-30
5.11 Host Control Register .................................................................................................................... 20-36
5.12 Power Control Register ................................................................................................................. 20-37
S3C2416X RISC MICROPROCESSOR
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