Block Diagram; Functional Descriptions - Samsung S3C2416 User Manual

S3C2416X RISC MICROPROCESSOR S3C2416X RISC MICROPROCESSOR

4 BLOCK DIAGRAM

Figure 23-1. IIS-Bus Block Diagram

5 FUNCTIONAL DESCRIPTIONS

IIS interface consists of register bank, FIFOs, shift registers, clock control, DMA finite state machine, and channel
control block as shown in Figure 23-1. Note that each FIFO has 32-bit width and 16 depth structure, which
contains left/right channel data. So, FIFO access and data transfer are handled with left/right pair unit. Figure 23-1
shows the internal functional block diagram of IIS interface, for actual GPIO pad name, please refer prior page's
SIGNALS table. For more detail guide of GPIO setting, please refer the GPIO chapter.
23-2