Clock Control Register (Clksrc, Clkdiv, Hclkcon, Pclkcon, And Sclkcon) - Samsung S3C2416 User Manual

S3C2416X RISC MICROPROCESSOR
8.2

CLOCK CONTROL REGISTER (CLKSRC, CLKDIV, HCLKCON, PCLKCON, AND SCLKCON)

The clock generator within the system controller has many dividers and MUXs to generate appropriate clocks.
These clocks are controlled by the clock control registers as described in here.
Register
CLKSRC 0x4C00_0020
CLKDIV0 0x4C00_0024
CLKDIV1 0x4C00_0028
CLKDIV2 0x4C00_002C
HCLKCON 0x4C00_0030
PCLKCON 0x4C00_0034
SCLKCON 0x4C00_0038
Address R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Clock source control register
Clock divider ratio control
register0
Clock divider ratio control
register1
Clock divider ratio control
register2
HCLK enable register
PCLK enable register
Special clock enable register
SYSTEM CONTROLLER
Reset Value
0x0000_0000
0x0000_000C
0x0000_0000
0x0000_0000
0xFFFF_FFFF
0xFFFF_FFFF
0xFFFF_DFFF
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