Power-On Oscillation Setting Timing - Samsung S3C2416 User Manual

S3C2416X RISC MICROPROCESSOR
Power
nRESET
XTIpll or
EXTCLK
Clock
Disable
VCO
output
FCLK
PLL can operate after OM[3:2] is latched.
...
PLL is configured by S/W first time.
VCO is adapted to new clock frequency.
...
tRST2RUN
...
MCU operates by XTIpll
or EXTCLK clcok.
Figure 26-6. Power-On Oscillation Setting Timing
tPLL
FCLK is new frequency.
ELECTRICAL DATA
26-9