Power Management Registers (Pwrmode And Pwrcfg) - Samsung S3C2416 User Manual

16/32-bit risc
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S3C2416X RISC MICROPROCESSOR
8.3

POWER MANAGEMENT REGISTERS (PWRMODE AND PWRCFG)

If you want to change the power management mode, you just write a bit(s) into PWRMODE register. Before
writing, you must configure condition to wake-up from the power down mode.
Register
PWRMODE
0x4C00_0040
PWRCFG
0x4C00_0060
S3C2416 consists of three power-down modes, which are IDLE, (Deep)STOP, and SLEEP. The mode transition
from the NORMAL mode occurs when the appropriate value is written into PWRMODE & PWRCFG register. If
software tries to write illegal value, i.e., tries to set multiple power modes concurrently, then the write operation will
be ignored.
PWRMODE
RESERVED
STOP
SLEEP
PWRCFG register controls the configuration of power mode transition.
PWRCFG
RESERVED
STANDBYWFI_EN
DEEP-STOP
SLEEP_CFG
RESERVED
NFRESET_CFG
Address
R/W
R/W
R/W
Bit
[31:17]
RESERVED
The system enters into STOP mode when this field is set to
[16]
'1'.
The system enters into SLEEP mode when this field is set to
[15:0]
'0x2BED'. The bit pattern, '0x2BED', represents "Go To BED".
Bit
[31:18]
-
Enable entering of IDLE mode by STANDBYWFI.
[17]
0 = Disable, 1 = Enable
Enable the system enters DEEP-STOP mode.
If user set 16th register of PWRMODE reg. (ie. STOP) while
this bit is configured to '1', the system enters DEEP-STOP
[16]
mode not STOP mode. To enter the DEEP-STOP mode
properly, this bit should be configured prior to setting STOP
mode bit.
Enable wakeup source
0 = Wakeup sources are enabled depending on BATT_FLT in
sleep mode. If BATT_FLT pin is asserted logic '1' system can
[15]
be exit from sleep mode by appropriate wakeup sources. If
not, system continuously remain it's sleep state.
1 = Enable wakeup sources regardless of BATT_FLT in sleep
mode.
[14:10]
-
Reset configuration when internal resets is generated
[9]
0 = Reset NAND flash controller.
1 = Do not reset NAND flash controller.
Description
Power mode control register
Power management configuration register
Description
Description
SYSTEM CONTROLLER
Reset Value
0x0000_0000
0x0000_0000
Initial Value
0
0
0
Initial Value
0x0000
0
0
0
0x00
0
2-31

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