Pcm Interrupt Status Register - Samsung S3C2416 User Manual

PCM AUDIO INTERFACE

3.9 PCM INTERRUPT STATUS REGISTER

The PCM_IRQ_STAT register is used to report IRQ status.
Register
PCM_IRQ_STAT
The bit definitions for the PCM_IRQ_STATUS Register are described below:
PCM_IRQ_STAT
Reserved
IRQ_PENDING
TRANSFER_DONE
TXFIFO_EMPTY
TXFIFO_ALMOST
_EMPTY
TXFIFO_FULL
TXFIFO_ALMOST
_FULL
TXFIFO_ERROR
_STARVE
TXFIFO_ERROR
_OVERFLOW
25-14
Address R/W
0x5C000014 R
Bit
[31:14] Reserved
[13]
Monitoring PCM IRQ.
1 = PCM IRQ is occurred.
0 = PCM IRQ is not occurred.
[12]
Interrupt is generated every time the serial shift for a word
completes
1 = IRQ is occurred.
0 = IRQ is not occurred.
[11]
Interrupt is generated whenever the TX FIFO is empty
1 = IRQ is occurred.
0 = IRQ is not occurred.
[10]
Interrupt is generated whenever the TxFIFO is ALMOST empty.
1 = IRQ is occurred.
0 = IRQ is not occurred.
[9]
Interrupt is generated whenever the TX FIFO is full
1 = IRQ is occurred.
0 = IRQ is not occurred.
[8]
Interrupt is generated whenever the TX FIFO is ALMOST full.
1 = IRQ is occurred.
0 = IRQ is not occurred.
[7]
Interrupt is generated for TX FIFO starve ERROR.
This occurs whenever the TX FIFO is read when it is still empty.
This is considered as an ERROR and will have unexpected
results
1 = IRQ is occurred.
0 = IRQ is not occurred.
[6]
Interrupt is generated for TX FIFO overflow ERROR.
This occurs whenever the TX FIFO is written when it is already
full. This is considered as an ERROR and will have unexpected
results
1 = IRQ is occurred.
0 = IRQ is not occurred.
Description
PCM Interrupt Status
Description
S3C2416X RISC MICROPROCESSOR
Reset Value
0x00000000
Initial State
0
0
0
0
0
0
0
0