Transaction Control With Data Transfer Using Dat Line Sequence (Using Dma) - Samsung S3C2416 User Manual

16/32-bit risc
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S3C2416X RISC MICROPROCESSOR
START
(1)
Set System Address Reg
(2)
Set Block Size Reg
(3)
Set Block Count Reg
(4)
Set Argument Reg
(5)
Set Transfer Mode Reg
(6)
Set Command Reg
(7)
Wait for Command
Complete Int
(8)
Clr Command Complete
Status
(9)
Get Response Data
Figure 20-12. Transaction Control with Data Transfer Using DAT Line Sequence (Using DMA)
(1) Set the system address for DMA in the System Address register.
(2) Set the value corresponding to the executed data byte length of one block in the Block Size register.
(3) Set the value corresponding to the executed data block count in the Block Count register(BLKCNT).
(4) Set the value corresponding to the issued command in the Argument register(ARGUMENT).
(5) Set the values for Multi / Single Block Select and Block Count Enable.
And at this time, set the value corresponding to the issued command for Data Transfer Direction, Auto CMD12
Enable and DMA Enable.
(6) Set the value corresponding to the issued command in the Command register(CMDREG).
NOTE: When writing to the upper byte of the Command register, the SD command is issued and DMA is started.
(7) And then wait for the Command Complete Interrupt.
(8) Write 1 to the Command Complete(STACMDCMPLT) in the Normal Interrupt Status register to clear this bit.
(9) Read Response register and get necessary information in accordance with the issued command.
Command Complete Int occur
(10)
Wait for Transfer
Complete Int and DMA Int
(11)
Check Interrupt Status
DMA Int occur
(12)
Clr DMA Status Interrupt
(13)
Set System Address Reg
HSMMC CONTROLLER
Transfer Complete Int
occur
(14)
Clr Transfer Complete status
Clr DMA Interrupt status
END
20-15

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