Dma Requeset Selection Register (Dmareqsel) - Samsung S3C2416 User Manual

S3C2416X RISC MICROPROCESSOR

4.10 DMA REQUESET SELECTION REGISTER (DMAREQSEL)

Register
DMAREQSEL0 0x4B000024
DMAREQSEL1 0x4B000124
DMAREQSEL2 0x4B000224
DMAREQSEL3 0x4B000324
DMAREQSEL4 0x4B000424
DMAREQSEL5 0x4B000524
DMAREQSELn Bit
HWSRCSEL [5:1]
SWHW_SEL [0]
Address R/W
R/W DMA0 Request Selection Register
R/W DMA1 Request Selection Register
R/W DMA2 Request Selection Register
R/W DMA3 Request Selection Register
R/W DMA4 Request Selection Register
R/W DMA5 Request Selection Register
Select DMA request source for each DMA.
→ Refer to the Table 11-1 on page 11-2.
This bits control the 8-1 MUX to select the DMA request source of
each DMA. These bits have meanings if and only if H/W request
mode is selected by DMAREQSELn[0].
Select the DMA source between software (S/W request mode) and
hardware (H/W request mode).
0 = S/W request mode is selected and DMA is triggered by setting
SW_TRIG bit of DMASKTRIG control register.
1 = DMA source selected by bit [5:1] is used to trigger the DMA
operation.
Description
Description
DMA CONTROLLER
Reset Value
000
000
000
000
000
000
Initial State
00000
0
8-17