Memory Current Address Register (Mcar); Burst Fifo Control Register(Fcon); Burst Fifo Status Register(Fstat) - Samsung S3C2416 User Manual

S3C2416X RISC MICROPROCESSOR

8.23 MEMORY CURRENT ADDRESS REGISTER (MCAR)

Register Address
MCAR 0x4980_008C
MCAR# Bit
MCAR [31:0]

8.24 BURST FIFO CONTROL REGISTER(FCON)

Register Address
FCON 0x4980_0100
MBAR# Bit
Reserved [31:9]
DMAEN [8]
Rreserved [7:5]
TF_CLR [4]
Reserved [3:1]
RF_CLR [0]

8.25 BURST FIFO STATUS REGISTER(FSTAT)

Register Address
FSTAT 0x4980_0104
FSTAT Bit
Reserved [31:14]
TF_FULL [13]
TF_CNT [12:8]
Reserved [7:6]
RF_FULL [5]
RF_CNT [4:0]
R/W
R Memory Current Address Register
R/W
R This register should have memory current address to be
transferred using DMA Interface.
R/W
R/W Burst DMA transfer Control
R/W
R/W Reserved
R/W DMA enable
R/W Reserved
R/W TX fifo clear
R/W Reserved
R/W RX fifo clear
R/W
R/W Burst DMA transfer Status
R/W
R Reserved
R TX FIFO Full
R # of data in TX fifo
R Reserved
R RX FIFO Full
R # of data in RX fifo
Description
Description
Description
Description
Description
Description
USB2.0 DEVICE
Reset Value
0x0
Initial State
Reset Value
0x0
Initial State
000000
0
000
0
000
0
Reset Value
0x0
Initial State
0
0
0
0
0
16-31