Samsung S3C2416 User Manual page 459

S3C2416X RISC MICROPROCESSOR
(1)
Set Block Size Reg
(2)
Set Block Count Reg
(3)
(4)
Set Transfer Mode Reg
(10-W)
Wait for Buffer Write
(11-W)
Clr Buffer Write Ready Status
(12-W)
(13-W)
Single or Multi
block transfer
(15)
Wait for Transfer Complete Int
(16)
Clr Transfer Complete Status
Figure 20-11. Transaction Control with Data Transfer Using DAT Line Sequence (Not using DMA)
START
Set Argument Reg
(9)
write
Write or Read ?
Ready Int
Buffer Write Ready
Int occur
Set Block Data
yes
More Blocks ?
no
(14)
Single / Multi /Infinite Block
(5)
Set Command Reg
(6)
Wait for Command
Complete Int
(7)
Clr Command Complete
Status
(8)
Get Response Data
read
(10-R)
Wait for Buffer Read
Ready Int
(11-R)
Clr Buffer Read Ready Status
(12-R)
Get Block Data
(13-R)
yes
More Blocks ?
Infinite block
transfer
Transfer ?
(17)
Abort Transaction
END
Command Complete Int occur
Buffer Read Ready
Int occur
no
HSMMC CONTROLLER
20-13