Uart Transmit Buffer Register (Holding Register & Fifo Register); Uart Receive Buffer Register (Holding Register & Fifo Register) - Samsung S3C2416 User Manual

S3C2416X RISC MICROPROCESSOR
3.9 UART TRANSMIT BUFFER REGISTER (HOLDING REGISTER & FIFO REGISTER)
There are four UART transmit buffer registers including UTXH0, UTXH1, UTXH2 and UTXH3 in the UART block.
UTXHn has an 8-bit data for transmission data.
Register Address
UTXH0 0x50000020
UTXH1 0x50004020
UTXH2 0x50008020
UTXH3 0x5000C020
UTXHn
TXDATAn [7:0]
3.10 UART RECEIVE BUFFER REGISTER (HOLDING REGISTER & FIFO REGISTER)
There are four UART receive buffer registers including URXH0, URXH1, URXH2 and URXH3 in the UART block.
URXHn has an 8-bit data for received data.
Register Address
URXH0 0x50000024
URXH1 0x50004024
URXH2 0x50008024
URXH3 0x5000C024
URXHn
RXDATAn [7:0]
NOTE: When an overrun error occurs, the URXHn must be read. If not, the next received data will also make an overrun
error, even though the overrun bit of UERSTATn had been cleared.
R/W
W (by byte)
W (by byte)
W (by byte)
W (by byte)
Bit
Transmit data for UARTn
R/W
R (by byte)
R (by byte)
R (by byte)
R (by byte)
Bit
Receive data for UARTn
Description
UART channel 0 transmit buffer register
UART channel 1 transmit buffer register
UART channel 2 transmit buffer register
UART channel 3 transmit buffer register
Description
Description
UART channel 0 receive buffer register
UART channel 1 receive buffer register
UART channel 2 receive buffer register
UART channel 3 receive buffer register
Description
UART
Reset Value
−
−
−
−
Initial State
−
Reset Value
−
−
−
−
Initial State
–
14-21