Block Size Register - Samsung S3C2416 User Manual

S3C2416X RISC MICROPROCESSOR

5.3 BLOCK SIZE REGISTER

This register is used to configure the number of bytes in a data block.
Register Address
BLKSIZE0 0X4AC00004
BLKSIZE1 0X4A800004
Name Bit
[15]
BUFBOUND [14:12] Host DMA Buffer Boundary
R/W
R/W Host DMA Buffer Boundary and Transfer Block Size
Register (Channel 0)
R/W Host DMA Buffer Boundary and Transfer Block Size
Register (Channel 1)
Reserved
The large contiguous memory space may not be available in the virtual
memory system. To perform long DMA transfer, System Address
register shall be updated at every system memory boundary during
DMA transfer. These bits specify the size of contiguous buffer in the
system memory. The DMA transfer shall wait at the every boundary
specified by these fields and the Host Controller generates the DMA
Interrupt to request the Host Driver to update the System Address
register.
In case of this register is set to 0 (buffer size = 4K bytes), lower 12-bit
of byte address points data in the contiguous buffer and the upper 20-
bit points the location of the buffer in the system memory. The DMA
transfer stops when the Host Controller detects carry out of the
address from bit 11 to 12.
These bits shall be supported when the DMA Support in the
Capabilities register is set to 1 and this function is active when the
DMA Enable in the Transfer Mode register is set to 1.
000b = 4K bytes (Detects A11 carry out)
001b = 8K bytes (Detects A12 carry out)
010b = 16K Bytes (Detects A13 carry out)
011b = 32K Bytes (Detects A14 carry out)
100b = 64K bytes (Detects A15 carry out)
101b = 128K Bytes (Detects A16 carry out)
110b = 256K Bytes (Detects A17 carry out)
111b = 512K Bytes (Detects A18 carry out)
Description
Description
HSMMC CONTROLLER
Reset Value
0x0
0x0
Initial Value
0
0
20-19