Motorola MPC533 Reference Manual page 1174

BBCMCR (BBC module configuration register)
4-16
BR0 - BR3 (memory controller base registers 0-3)
10-34
Breakpoint counter B value and control register
(COUNTB) 21-53
CALRLAM_OTR (CALRAM ownership trace
register) 20-12
CMPA-CMPD (comparator A-D value registers )
21-48
CMPE-CMPF (comparator E-F value registers)
21-54
CMPG-CMPH (comparator G-H value registers)
21-54
COLIR (change of lock register) 8-36
COUNTA (breakpoint counter A value and con-
trol register) 21-53
COUNTB (breakpoint counter B value and con-
trol register) 21-53
CRAM_RBAx (CALRAM region base address
register) 20-10
CRAMMCR (CALRAM module configuration
register) 20-8
CRAMOVL (CALRAM overlay configuration
register) 20-11
DEC (decrementer register) 6-41
DER (debug enable register) 21-50
DMBR (dual mapping base register) 10-38
DPDR (development port data register) 21-61
Dual mapping option register 10-39
ECR (exception cause register) 21-49
EIBADR (external interrupt relocation table base
address register) 4-22
EMCR (external master control register) 6-30
General-Purpose I/O registers 6-47
GPDI (general-purpose data in register) 18-18
GPDO (general-purpose data out register) 18-17
ICTRL (I-bus support control register) 21-58,
A-21
Internal memory map register 6-29
Keep alive power registers lock mechanism 8-24
L2U
global region attribute register (L2U_GRA)
11-17
module configuration register (L2U_MCR)
11-15
region attribute registers (L2U_RAx) 11-16
region base address registers (L2U_RBAx)
11-15
LCTRL1 (L-bus support control register 1) 21-55
LCTRL1 (L-bus support control register 2) 21-56
MBISM
interrupt registers 17-70
MCPSMSCR (MCPSM status/control register)
RegIndex-4
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
MDASMSCR (MDASM status/control register)
MI_GRA (global region attribute register) 4-21
MI_RA 1 - 3 (region base address registers (1 - 3))
MI_RBA 0 - 3 (region base address registers (0 -
MIOS
MIOS1
MIOS14ER0 interrupt enable register 17-66
MIOS14ER1interrupt enable register 17-68
MIOS14MCR (MIOS14 module configuration
MIOS14RPR0 request pending register 17-67
MIOS14RPR1 request pending register 17-68
MIOS14SR0 interrupt status register 17-66, 22-8
MIOS14SR1interrupt status register 17-67
MIOS14TPCR (test and pin control register)
MMCSMCNT (MMCSM up-counter register)
MMCSMMML (MMCSM modulus latch regis-
MMCSMSCR (MMCSMstatus/control register)
MPIOSMDDR (MPIOSM data direction register)
MPIOSMDR (MPIOSM data register) 17-63
MPWMCNTR (MPWMSM counter register)
MPWMPERR (MPWMSM period register) 17-57
MPWMPULR (MPWMSM pulse width register)
MPWMSCR (MPWMSM status/control register)
MSTAT (memory controller status registers)
OR0 - OR3 (memory controller option registers
PDMCR (pads module configuration register)
PDMCR2 (pads module configuration register)
PISCR (periodic interrupt status and control reg-
PITC (periodic interrupt timer count register)
MPC533 Reference Manual
17-16
17-43
4-19
3)) 4-18
bus interface (MBISM) Registers 17-11
interrupt level register 0 (MIOSLVL0)
(MIOS1LVL1) 17-70
interrupt level register 1 (MIOSLVL1)
(MIOS1LVL0) 17-70
module and version
(MIOS1VNR) 17-13
register) 17-13
17-12
17-23
ter) 17-23
17-24
17-63
17-57
17-57
17-58
10-34
0-3) 10-36
2-23
2-24
ister) 6-45
number register
MOTOROLA