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Register General and Diagram Index
A
Associated registers 10-4
B
BAR (breakpoint address register) 21-61
BBCMCR (BBC module configuration register) 4-16
BR0 - BR3 (emory controller base registers 0 -3)
10-34
Breakpoint counter B value and control register
(COUNTB) 21-53
C
CALRAM_OTR (CALRAM ownership trace register)
20-12
CANCTRL0 (control register 0) 16-29
CANCTRL1 (control register 1) 16-30
CANCTRL2 (control register 2) 16-32
CMPA-CMPD (comparator A-D value registers)
21-48
CMPE-CMPF (comparator E-F value registers) 21-54
CMPG-CMPH (comparator G-H value registers)
21-54
COLIR (change of lock interrupt register) 8-36
COUNTA (breakpoint counter A value and control
register) 21-53
COUNTB (breakpoint counter B value and control
register) 21-53
CRAM_RBAx (CALRAM region base address regis-
ter) 20-10
CRAMMCR (CALRAM module configuration regis-
ter) 20-8
CRAMOVL (CALRAM overlay configuration regis-
ter) 20-11
D
DDRQS (PORTQS data direction register) 15-14
DEC (decrementer register) 3-26, 6-41
DER (debug enable register) 21-50, 21-51
DMBR (dual mapping base register) 10-38
DPDR (development port data register) 21-61
Dual mapping option register 10-39
E
ECR (exception cause register) 21-49
EIBADR (external interrupt relocation table base ad-
dress register) 4-22
EMCR (external master control register) 6-30
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Register General and Diagram Index
G
General-Purpose I/O registers 6-47
GPDI (general-purpose data in register) 18-18
GPDO (general-purpose data out register) 18-17
I
ICTRL (I-bus support control register) 21-58, A-21
IMASK (interrupt mask register) 16-37
Internal memory map register 6-29
K
Keep alive power registers lock mechanism 8-24
L
L2U
global region attribute register (L2U_GRA) 11-17
module configuration register (L2U_MCR) 11-15
region attribute registers (L2U_RAx) 11-16
region base address registers (L2U_RBAx) 11-15
L2U_GRA (L2U global region attribute register)
11-17
L2U_MCR (L2U module configuration register)
11-15
L2U_RAx (L2U region X attribute register) 11-16
L2U_RBAx (L2U region x base address register)
11-16
LCTRL1 (L-bus support control register 1) 21-55
LCTRL1 (L-bus support control register 2) 21-56
LCTRL2 (L-bus support control register 2) 21-56
M
MBISM
interrupt registers 17-70
MCPSMCR (MCPSM status/control register) 17-16
MDASMSCR (MDASM status/control register) 17-43
MI_GRA (global regionattribute register) 4-21
MI_RA 1 - 3 (region base address registers (1 - 3))
4-19
MI_RBA 0 - 3 (region base address registers (0 - 3))
4-18
MIOS
bus interface (MBISM) Registers 17-11
MIOS1
interrupt
level
register
(MIOS1LVL0) 17-70
interrupt
level
register
(MIOS1LVL0) 17-70
0
(MIOSLVL0)
1
(MIOSLVL1)
RegIndex-1
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