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System protection registers 6-39
System timer registers 6-41
T
TBREF0 (ime base reference registers) 6-42
TBREF1 (time base reference register 1) 6-43
TBSCR (time base control and status register) 6-43
TESR (transfer error status register) 6-40
TIMER (free running timer register) 16-32
TouCAN
CANCTRL0 (control register 0) 16-29
CANCTRL1 (control register 1) 16-30
CANCTRL2 (control register 2) 16-32
CANICR (interrupt configuration register) 16-28
CANMCR (module configuration register) 16-26
ESTAT (error and status register) 16-35
IFLAG (interrupt flag register) 16-38
IMASK (interrupt mask register) 16-37
PRESDIV (prescaler divide register) 16-31
receive buffer 14 mask registers 16-34
receive buffer 15 mask registers 16-34
receive mask registers 16-7
RXGMSKHI (receive global mask registers)
16-33
Test configuration register 16-28
Tx data register 18-17
Tx_Config_1 (Tx configuration register 1) 18-14
Tx_Config_2 (Tx configuration register 2) 18-14
U
UC3FCFIG (hard reset configuration word) 19-16
UC3FCTL (UC3F EEPROM high voltage control reg-
ister 19-11
UIMB
module configuration register (UMCR) 12-8
pending interrupt request register (UIPEND) 12-9
test control register (UTSTCREG) 12-9
UIPEND (UIMB pending interrupt reqiuest register)
12-9
UMCR (UIMB module configuration register) 12-8
V
VSRMSR (VDDSRM
sensor register) 8-37
X
XER (integer exception register) 3-19
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Register General and Diagram Index
RegIndex-7
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