Oscillator; 3.1 Connecting A Crystal Resonator - Renesas H8S/2633 Series Hardware Manual

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LPWRCR is an 8-bit readable/writable register that performs power-down mode control. The

following pertains to bits 1 and 0. For details of the other bits, see section 24.2.3, Low-Power

Control Register (LPWRCR). LPWRCR is initialized to H'00 by a reset and in hardware standby

mode. It is not initialized in software standby mode.

Bits 1 and 0—Frequency Multiplication Factor (STC1, STC0): The STC bits specify the

frequency multiplication factor of the PLL circuit.

Note: A system clock frequency multiplied by the multiplication factor (STC1 and STC0) should

not exceed the maximum operating frequency defined in section 26 and 27, Electrical

Characteristics.

The input clock frequency is 2 MHz to 25 MHz. With the H8S/2633R and H8S/2695 PLL

must be set to use a multiplier of × 2 or × 4 when operating at frequencies of 25 MHz < ø

23B.3 Oscillator

Clock pulses can be supplied by connecting a crystal resonator, or by input of an external clock.

23B.3.1 Connecting a Crystal Resonator

Circuit Configuration: A crystal resonator can be connected as shown in the example in figure

23B-2. Select the damping resistance R

crystal should be used.

Figure 23B-2 Connection of Crystal Resonator (Example)

Setting prohibited

according to table 23B-2. An AT-cut parallel-resonance

= 10 pF to 22 pF

if 2 MHz ≤ φ < 20 MHz

if 20 MHz ≤ φ ≤ 25 MHz

(Initial value)