Table of Contents
Advertisement
26.3.3
Bus Timing
Table 26-7 lists the bus timing.
Table 26-7 Bus Timing
Condition:
PV
= 4.5 V to 5.5 V, AV
CC
V
= AV
SS
specifications), T
Item
Address delay time
Address setup time
Address hold time
CS delay time 1
CS delay time 2
AS delay time
RD delay time 1
RD delay time 2
Read data setup time
Read data hold time
Read data access time 1
Read data access time 2
Read data access time 3
Read data access time 4
Read data access time 5
WR delay time 1
WR delay time 2
WR pulse width 1
WR pulse width 2
Write data delay time
Write data setup time
Write data hold time
WR setup time
WR hold time
1062
= 4.5 V to 5.5 V, V
CC
= PLLV
= 0 V, ø = 2 to 28 MHz, T
SS
SS
= –40°C to +85°C (wide-range specifications)
a
Symbol
Min
t
—
AD
0.5 × t
t
AS
0.5 × t
t
AH
t
—
CSD1
t
—
CSD2
t
—
ASD
t
—
RSD1
t
—
RSD2
t
15
RDS
t
0
RDH
t
—
ACC1
t
—
ACC2
t
—
ACC3
t
—
ACC4
t
—
ACC5
t
—
WRD1
t
—
WRD2
1.0 × t
t
WSW1
1.5 × t
t
WSW2
t
—
WDD
0.5 × t
t
WDS
0.5 × t
t
WDH
0.5 × t
t
WCS
0.5 × t
t
WCH
= 4.5 V to AV
ref
= –20°C to +75°C (regular
a
Max
20
—
– 13
cyc
—
– 8
cyc
15
15
15
15
15
—
—
1.0 × t
– 15
cyc
1.5 × t
– 15
cyc
2.0 × t
– 15
cyc
2.5 × t
– 15
cyc
3.0 × t
– 15
cyc
15
15
– 13
—
cyc
– 13
—
cyc
22
– 13
—
cyc
– 8
—
cyc
– 10
—
cyc
– 10
—
cyc
,
CC
Unit
Test Conditions
ns
Figure 26-6 to
ns
figure 26-11
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Advertisement
Table of Contents
