Clock Stop Register 1 (Ckstpr1) - Renesas H8/38024 Hardware Manual

Bits 6 to 0—Reserved
Bits 6 to 0 are reserved; they are always read as 1, and cannot be modified.
12.2.4

Clock Stop Register 1 (CKSTPR1)

Bit 7

Initial value 1

Read/Write
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to the A/D converter is described here. For details of the other bits,
see the sections on the relevant modules.
Bit 4—A/D Converter Module Standby Mode Control (ADCKSTP)
Bit 4 controls setting and clearing of module standby mode for the A/D converter.
ADCKSTP Description
0 A/D converter is set to module standby mode
1 A/D converter module standby mode is cleared
6 5

S32CKSTP ADCKSTP TGCKSTP
1 1

R/W R/W
4 3
TFCKSTP TCCKSTP TACKSTP
1 1
R/W R/W
Rev. 6.00, 08/04, page 393 of 628
2 1
1 1
R/W R/W
(initial value)
0
1