Pin Configuration; Register Configuration - Renesas H8/38024 Hardware Manual

10.1.3

Pin Configuration

Table 10.1 shows the SCI3 pin configuration.
Table 10.1 Pin Configuration
Name
SCI3 clock
SCI3 receive data input
SCI3 transmit data output
10.1.4

Register Configuration

Table 10.2 shows the SCI3 register configuration.
Table 10.2 Registers
Name
Serial mode register
Bit rate register
Serial control register 3
Transmit data register
Serial status register
Receive data register
Transmit shift register
Receive shift register
Bit rate counter
Clock stop register 1
Serial port control register
Rev. 6.00, 08/04, page 322 of 628
Abbr. I/O
SCK I/O
32
RXD Input
32
TXD Output
32
Abbr. R/W
SMR R/W
BRR R/W
SCR3 R/W
TDR R/W
SSR R/W
RDR R
TSR Protected —
RSR Protected —
BRC Protected —
CKSTPR1 R/W
SPCR R/W
Function
SCI3 clock input/output
SCI3 receive data input
SCI3 transmit data output
Initial Value Address
H'00 H'FFA8
H'FF H'FFA9
H'00 H'FFAA
H'FF H'FFAB
H'84 H'FFAC
H'00 H'FFAD
—
—
—
H'FF H'FFFA
— H'FF91