Renesas H8/38024 Hardware Manual page 109

8-bit single-chip microcomputer h8 family/h8/300l super low power series
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Bit 7—Timer A Interrupt Enable (IENTA)
Bit 7 enables or disables timer A overflow interrupt requests.
Bit 7
IENTA
Description
0
Disables timer A interrupt requests
1
Enables timer A interrupt requests
Bit 6—Reserved
Bit 6 is reserved: it can only be written with 0.
Bit 5—Wakeup Interrupt Enable (IENWP)
Bit 5 enables or disables WKP
Bit 5
IENWP
Description
Disables WKP
0
Enables WKP
1
Bits 4 and 3—IRQ
4
Bits 4 and 3 enable or disable IRQ
Bit n
IENn
Description
Disables interrupt requests from pin IRQn
0
Enables interrupt requests from pin IRQn
1
Bit 2—IRQAEC Interrupt Enable (IENEC2)
Bit 2 enables or disables IRQAEC interrupt requests.
Bit 2
IENEC2
Description
0
Disables IRQAEC interrupt requests
1
Enables IRQAEC interrupt requests
to WKP
interrupt requests.
7
0
to WKP
interrupt requests
7
0
to WKP
interrupt requests
7
0
and IRQ
Interrupt Enable (IEN4 and IEN3)
3
and IRQ
4
interrupt requests.
3
(initial value)
(initial value)
(initial value)
(initial value)
Rev. 6.00, 08/04, page 79 of 628
(n = 4 or 3)

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